Logic Design

1. Announcement

● There is no class on 10/24 (international faculty meeting in China), 10/31 (entrance exam committee meeting)

● There is a mid-exam grade. (claim: 11/9~11/10, 3~5pm., 301-518) mid-term grade

● There is a final-exam on 12/7. (class hour)

● There is a final-exam grade. (claim: 12/12~12/15, 2~4pm., 138-317) final-term grade

● There is a course evaluation2. (12/11~12/22) Questionnaire, Manual

2. Overview

Introduces elements consisting digital logic circuits and approaches to design digital logic circuits. Learn about combinational logic and sequential logic, basic elements of circuits and how to design optimized logic circuit.

3. Textbook

Contemporary logic design, 2^nd edition: Randy Katz, Gaetano Borriello, Prentice Hall

4. Class

Time: 10:30-11:45 am, Tue. And Thu

Place: 301-203

5. Schedule

● Overview Overview-slide

1. Introduction 01-slide

2. Combinational Logic Design 02-slide

3. Working with Combinational Logic 03-slide (final version)

4. Combinational Logic Technologies 04-slide (final version)

5. Case studies for Combinational Logic 05-slide (final version)

● Mid-term Exam

6. Sequential Logic Design 06-slide (p.25 is deleted. final version)

7. Finite State Machines 07-slide (final version)

8. Working with Finite State Machines 08-slide (final version)

9. Sequential Logic Technologies 09-slide (final version)

10. Case studies in Sequential Logic Design 10-slide (final version)

● Final Exam

6. Grading

Two exams 2*40%

Attendance 10%

Homework 10%

7. Board