Logic Design
(4190.201 002, prof. Taekyoung, Kwon)
1. Announcement
¡Ü There are scores of final exam and HW2. (final-exam, HW2)
Contact TA. Shim, if you want to
claim.
(
(
(2008/6/23:
2pm~4pm)
¡Ü The final exam will be on Mon (6/16).
¡Ü You can submit the HW2 ASAP to Prof. Kwon or to TA.
Shim. (during Prof. Kwon¡¯s absence)
But there is some
penalty.
¡Ü There is a score of mid-term exam. ( Score )
Contact Prof. Kwon, if
you want to claim. (Claim period:
¡Ü There is a course evaluation. (
¡Ü If you want to take both "logic
design" and "logic design lab" courses, please register for the
courses of the same professor.
¡Ü There is no class on 3/3 and 3/5.
2. Overview
¡Ü Introduces
elements consisting digital logic circuits and approaches to design digital
logic circuits. Learn about combinational logic and sequential logic, basic elements
of circuits and how to design optimized logic circuit. ( overview )
3. Textbook
¡Ü Contemporary logic design, 2nd edition: Randy
Katz, Gaetano Borriello, Prentice Hall
4. Class
¡Ü Building 302, Room 107
MON/WED , AM10:30
~
5. Schedule
1. Introduction ( 01-intro
)
2. Combinational Logic Design ( 02-Comb )
3. Working with Combinational Logic ( 03-WorkComb )
4. Combinational Logic Technologies ( 04-CombTech )
5. Case studies for Combinational Logic ( 05-CombEx )
6. Sequential Logic design ( 06-Seq
)
n Mid-term Exam
7.
8. Working with
9. Sequential Logic Technologies ( 09-SeqTech )
10. Case studies in Sequential Logic Design ( 10-SeqEx )
n Final exam
Verilog ( verilog-total
)
6. Homework
1. HW1 ( hw1, solution, results
)
2. HW2 ( hw2 )
7. Board
8. Grading
Attendance 20%
Homework 20%
Mid-term Exam : 30%
Final Exam : 30%
9. Professor
Taekyoung Kwon
phone: 880-9105
email: tkkwon@snu.ac.kr
10. TA (Web)
Yoonbo Shim
Office: 301-518
Phone: 880-1832
Email: ybshim@mmlab.snu.ac.kr